The present invention is related to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a thin-film transistor (TFT) used as a switching device of a liquid crystal device (LCD).
In response to a rapidly increasing demand for space-saving, personalized displays which serve as the primary information transmission interface between human beings and computers (and other types of computerized devices), various types of flat screen or flat panel displays have been developed to replace conventional display devices, particularly CRTs, which are relatively large, bulky and obtrusive. Among the most attractive of these flat panel displays are LCDs, which, in some forms, match or surpass the color picture quality of CRTs. In particular, an active matrix LCD utilizes a combination of liquid crystal technology and semiconductor technology, and is generally recognized as being superior to CRT displays.
The active matrix LCDs utilize an active device having a non-linear characteristic for driving each of a multiplicity of pixels arranged in a matrix configuration, to thereby provide both a memory function and an electronic optical effect of a liquid crystal. A thin film transistor (TFT) is ordinarily used as an active device. In an active matrix LCD which utilizes such active devices, tens of thousands to millions of active devices are integrated on a glass substrate together with a pixel address wiring pattern, to thereby provide an active matrix driver circuit, with the TFTs serving as switching devices.
FIG. 1 is a schematic layout of a conventional TFT. Referring to FIG. 1, reference number P1 denotes a mask pattern for forming a gate electrode pattern of a transistor, P3 denotes a mask pattern for forming a semiconductor layer pattern used as a channel portion of a transistor, and P5 denotes a mask pattern for symmetrically forming a source/drain pattern centering the gate electrode pattern.
FIG. 2 is a sectional view taken along A-A' line in FIG. 1. A TFT is manufactured as follows, by employing the aforementioned mask patterns. A metal layer for a gate electrode is deposited on glass substrate 10, and the deposited metal layer is patterned by employing mask pattern P1 of FIG. 1 to form a gate electrode 1. Then, a gate insulating layer 2 is formed on the whole surface of the glass substrate on which the gate electrode 1 is formed, and a first material layer for forming a semiconductor layer and a second material layer which is formed by highly doping impurities into the upper portion of the first material layer are formed thereon sequentially. Then, the first and second material layers are patterned simultaneously by employing the mask pattern (P3 in FIG. 1) for forming a semiconductor layer 3' constituted by the first material layer and an ohmic contact layer 4' constituted by the second material layer. After forming the semiconductor layer 3' and the ohmic contact layer 4', a metal layer is deposited on the entire surface of the resultant structure and then patterned (employing the mask pattern P5 in FIG. 1) to form source and drain electrodes 5a and 5b. By removing the portion of the ohmic contact layer which is not in contact with the source and drain electrodes, by means of an etching process, a TFT is completed as shown in FIG. 2.
In a conventional method for manufacturing such a TFT, a dry etching process (generally, a plasma etching process) is typically used in etching the portion of the ohmic contact layer which is not in contact with the source and drain electrodes. Typically, this plasma etching process is implemented as follows. First, a plurality of wafers to be etched are put into a reactor, and then the reactor is evacuated. Thereafter, the reactor is filled with a reacting gas (for use as an etching gas), for instance, carbon tetrafluoride CF.sub.4 or sulfur hexafluoride SF.sub.6. A small quantity of oxygen is added when filling the reacting gas. Etching is started by applying RF energy to the reacting gas mixture, which produces a highly reactive fluorine compound.
When the etching process is performed by employing such a plasma etching technique, the etching rate is faster at the edge of a wafer than at its center, due to the distance between the wafers. Therefore, conventionally, when plasma etching is carried out in etching away the portion of the ohmic contact layer which is not in contact with the source and drain electrodes, it is difficult to control the etching conditions due to the differences of the etching rate. Consequently, as an LCD employing such TFTs as switching devices becomes larger, the substrate becomes commensurately larger, thereby resulting in increased incidences of TFT defects due to the disparity of the etching rate at the center and edge portions thereof.
Also, when a photo-sensitive film is employed as an etching mask used in the etching process, the photo-sensitive film is hardened during the plasma etching process, thereby rendering it difficult to remove by chemical methods. Therefore, in most plasma systems, the gas mixture is changed from carbon tetrafluoride CF.sub.4 (or sulfur hexafluoride SF.sub.6) to pure oxygen, in order to remove the photo-sensitive film after the etching step is completed. Then, the photo sensitive film is oxidized to form carbon dioxide gas and vapor, and removed. This technique adversely affects the device characteristics. Additionally, the etching process becomes unduly complicated since the reacting gas mixture must be changed to oxygen in order to remove the photo-sensitive film.
Further, when etching away the portion of the ohmic contact layer which is not in contact with the source and drain electrodes, the semiconductor layer underlying the ohmic contact layer may be exposed to the plasma etchant, thereby degrading the semiconductor layer. Moreover, if undercutting or excessive etching occurs, the insulation characteristic between the gate electrode and source and drain electrodes deteriorates, and an electrical short can occur therebetween.